A three‐level isolated dc‐dc SEPIC converter with parallel‐connected output

This paper presents a comprehensive theoretical analysis and experimental results for three‐level isolated dc‐dc converter based on the single‐ended primary‐inductance converter (SEPIC) topology. The main advantage of this structure is the reduction of voltage stress on semiconductors comparing it to the conventional SEPIC converter. Voltage stress is the major challenge associated with the conventional SEPIC structure, and contributions in this area can extend the range of applications for the family of SEPIC converters. The analyzed structure contains two switches, and their commands can be either equal or phase‐shifted by 180°. This provides four different modes of operation in discontinuous conduction mode (DCM), which have different operating stages, waveforms, and design equations. In this paper, the topology with parallel‐connected output and the static and dynamic theoretical analysis in DCM, for the four command signal profiles, are presented. The advantages and disadvantages, control strategy, experimental results, and a comparative analysis with the conventional SEPIC converter are discussed. The dc‐dc SEPIC converter was verified by experimental results from a proof‐of‐concept prototype with 500 W rated power, 400 V input voltage, 120 V output voltage, and 50 kHz switching frequency. The converter achieved 94.72% efficiency at rated power. The proposed structure provides a reduction of voltage stress on semiconductors when compared with the conventional single‐ended primary‐inductance converter (SEPIC) converter, which can extend the application range of SEPIC‐type converters with higher input voltages. In addition, a modulation strategy which results in two command signals with the same duty cycle value and 180° phase‐shifted is used, reducing the volume of the input inductors ( Li1 and Li2) and the output capacitor ( Co).