Evaluation on Negative Voltage Analysis Model for Gate Driving of MOSFET Application

In power converter or inverter applications, MOSFETs are used as switches to control the value of output current or voltage. The MOSFET turn on/off are controlled by the PWM control IC or MCU with gate driver to achieve high frequency switching. In general, the absolute maximum negative voltage rating of the driving pin at the control IC or gate driver is not sufficient and the driving pin could be damaged by negative voltage which could be induced by the high frequency switching during the MOSFET turn on/off. The main purpose of this paper is to derive and adopt the negative voltage analysis model to evaluate and find out the MOSFET parameter relation which leads to the control IC damaged by negative voltage. The experimental results are demonstrated on the LLC converter with 400 V input voltage and 12 V output voltage. The negative voltage waveforms are measured from the LLC half bridge and synchronous rectifier circuits. Several experimental results are presented to validate this analysis model.