Performance Analysis of Enhanced AES-128 and Blowfish Algorithms Through Parallel-Pipelined-Memory Techniques

Currently, the advanced encryption standard (AES)-128 algorithm is deployed by the Institute of Electrical and Electronics Engineers standards, and it is widely used to secure wireless communication in various radio frequency bands. This paper proposes an enhanced Blowfish algorithm with better performance than the AES-128 as a potential security function to be implemented in mobile devices. A performance analysis based on Artix-7 field programmable gate array platform is conducted in terms of the design throughput, hardware utilisation and power consumption of the proposed AES-128 and Blowfish architectures, which are enhanced by using the parallel–pipelined–memory (P 2 M) techniques. These techniques contribute to the performance improvement of the P 2 M AES-128 and P 2 M Blowfish, with the proposed Blowfish achieving 50% better power throughput and 45.3% lower logic resources. Findings show that the P 2 M Blowfish not only secures mobile devices but can also reduce the design space and prolong battery lifetime for longer usage at a high data rate. Graphical abstract