Effect of ALD processes on physical and electrical properties of HfO2 dielectrics for the surface passivation of a CMOS image sensor application
The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO 2 as well as stacked with 3 and 5 nm Al 2 O 3...
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Veröffentlicht in: | IEEE access 2022, Vol.10, p.1-1 |
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Sprache: | eng |
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Zusammenfassung: | The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO 2 as well as stacked with 3 and 5 nm Al 2 O 3 thin films. The HfO 2 /Si and Al 2 O 3 /HfO 2 /Si metal-oxide-semiconductor structures were used to analyze the fixed charge density (Q f ) and interface trap density (D it ). The as-synthesized samples show high D it and Q f values (10 12 cm -2 eV -1 ) and a minority carrier lifetime of 15-300 μs. The finite-difference time-domain simulation of high-k dielectrics confirmed that the Al 2 O 3 (top)/HfO 2 stacked structures expected higher quantum efficiency for CIS application. The effect of vacuum annealing (VA) and forming gas annealing (FGA) treatments succeeded with the decomposition of the D it and increase in carrier lifetime. The H 2 ambient FGA samples showed a remarkable decrease in the D it values. To improve the overall performance of the device after passivation, we employed an Al 2 O 3 /HfO 2 bilayer structure, which showed a low D it of 10 11 cm -2 eV -1 and a minority carrier lifetime of ~3,700 μs after 400 °C and 30 min FGA. We believe that this surface passivation strategy will pave way for future CIS technology regarding the development of lower defective surface and superior performance. |
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ISSN: | 2169-3536 |
DOI: | 10.1109/ACCESS.2022.3183593 |