A two‐dimensional RC network topology for fault‐tolerant design of analog circuits
Summary This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐orde...
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| Veröffentlicht in: | International journal of circuit theory and applications 2022-07, Vol.50 (7), p.2653-2659 |
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| container_title | International journal of circuit theory and applications |
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| creator | Paiva, Henrique Mohallem Galvão, Roberto Kawakami Harrop Hadjiloucas, Sillas Yoneyama, Takashi Marcolino, Matheus Henrique |
| description | Summary
This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐order admittance dynamics. A Monte Carlo method is employed to describe the effect of simultaneous faults (short or open circuit) in random network elements in terms of confidence bounds in the frequency‐domain admittance profile. Faults in 10% of the elements resulted in only minor changes of the frequency response (up to 3.9 dB in magnitude and 12.5
∘ in phase in 95% of the cases). An example is presented to illustrate the use of the proposed RC network in the fault‐tolerant design of a low‐pass filter.
This paper proposes a novel two‐dimensional RC network topology that can be used as a fault‐tolerant building block for analog circuit design. The network follows simple first‐order admittance dynamics under nominal conditions. A Monte Carlo method is employed to characterize the effect of simultaneous faults (short or open circuit) in random network elements. A fault‐tolerant design of a low‐pass filter is presented for illustration. |
| doi_str_mv | 10.1002/cta.3299 |
| format | Article |
| fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2684833165</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2684833165</sourcerecordid><originalsourceid>FETCH-LOGICAL-c2889-15020f0dc9d936329a1f10d1b000e962df0960f489826a04b133453fe3ba86333</originalsourceid><addsrcrecordid>eNp10M9KAzEQBvAgCtYq-AgBL162TpJtmhzL4j8oCFLFW0h3k5K63dQkS-nNR_AZfRJT69XTwPCb4eND6JLAiADQmzrpEaNSHqEBATkpACZvx2gAIEUhheCn6CzGFQAIyuQAvU5x2vrvz6_GrU0Xne90i58r3Jm8Du84-Y1v_XKHrQ_Y6r5N2SbfmqC7hBsT3bLD3mKd7_wS1y7UvUvxHJ1Y3UZz8TeH6OXudl49FLOn-8dqOitqKoQsyBgoWGhq2UjGc2xNLIGGLHI-IzltLEgOthRSUK6hXBDGyjGzhi204IyxIbo6_N0E_9GbmNTK9yFniYpyUQrGCB9ndX1QdfAxBmPVJri1DjtFQO1bU7k1tW8t0-JAt641u3-dqubTX_8Dq9lu8Q</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2684833165</pqid></control><display><type>article</type><title>A two‐dimensional RC network topology for fault‐tolerant design of analog circuits</title><source>Wiley Online Library All Journals</source><creator>Paiva, Henrique Mohallem ; Galvão, Roberto Kawakami Harrop ; Hadjiloucas, Sillas ; Yoneyama, Takashi ; Marcolino, Matheus Henrique</creator><creatorcontrib>Paiva, Henrique Mohallem ; Galvão, Roberto Kawakami Harrop ; Hadjiloucas, Sillas ; Yoneyama, Takashi ; Marcolino, Matheus Henrique</creatorcontrib><description>Summary
This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐order admittance dynamics. A Monte Carlo method is employed to describe the effect of simultaneous faults (short or open circuit) in random network elements in terms of confidence bounds in the frequency‐domain admittance profile. Faults in 10% of the elements resulted in only minor changes of the frequency response (up to 3.9 dB in magnitude and 12.5
∘ in phase in 95% of the cases). An example is presented to illustrate the use of the proposed RC network in the fault‐tolerant design of a low‐pass filter.
This paper proposes a novel two‐dimensional RC network topology that can be used as a fault‐tolerant building block for analog circuit design. The network follows simple first‐order admittance dynamics under nominal conditions. A Monte Carlo method is employed to characterize the effect of simultaneous faults (short or open circuit) in random network elements. A fault‐tolerant design of a low‐pass filter is presented for illustration.</description><identifier>ISSN: 0098-9886</identifier><identifier>EISSN: 1097-007X</identifier><identifier>DOI: 10.1002/cta.3299</identifier><language>eng</language><publisher>Bognor Regis: Wiley Subscription Services, Inc</publisher><subject>Analog circuits ; Circuit design ; Dimensional tolerances ; Electrical impedance ; fault resilience ; fault‐tolerant circuits ; filter design ; Frequency response ; Monte Carlo simulation ; Network topologies ; RC networks</subject><ispartof>International journal of circuit theory and applications, 2022-07, Vol.50 (7), p.2653-2659</ispartof><rights>2022 John Wiley & Sons Ltd.</rights><rights>2022 John Wiley & Sons, Ltd.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c2889-15020f0dc9d936329a1f10d1b000e962df0960f489826a04b133453fe3ba86333</cites><orcidid>0000-0002-2326-774X ; 0000-0003-2380-6114 ; 0000-0001-5375-1076 ; 0000-0001-9794-8815 ; 0000-0001-7081-8383</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://onlinelibrary.wiley.com/doi/pdf/10.1002%2Fcta.3299$$EPDF$$P50$$Gwiley$$H</linktopdf><linktohtml>$$Uhttps://onlinelibrary.wiley.com/doi/full/10.1002%2Fcta.3299$$EHTML$$P50$$Gwiley$$H</linktohtml><link.rule.ids>314,780,784,1416,27923,27924,45573,45574</link.rule.ids></links><search><creatorcontrib>Paiva, Henrique Mohallem</creatorcontrib><creatorcontrib>Galvão, Roberto Kawakami Harrop</creatorcontrib><creatorcontrib>Hadjiloucas, Sillas</creatorcontrib><creatorcontrib>Yoneyama, Takashi</creatorcontrib><creatorcontrib>Marcolino, Matheus Henrique</creatorcontrib><title>A two‐dimensional RC network topology for fault‐tolerant design of analog circuits</title><title>International journal of circuit theory and applications</title><description>Summary
This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐order admittance dynamics. A Monte Carlo method is employed to describe the effect of simultaneous faults (short or open circuit) in random network elements in terms of confidence bounds in the frequency‐domain admittance profile. Faults in 10% of the elements resulted in only minor changes of the frequency response (up to 3.9 dB in magnitude and 12.5
∘ in phase in 95% of the cases). An example is presented to illustrate the use of the proposed RC network in the fault‐tolerant design of a low‐pass filter.
This paper proposes a novel two‐dimensional RC network topology that can be used as a fault‐tolerant building block for analog circuit design. The network follows simple first‐order admittance dynamics under nominal conditions. A Monte Carlo method is employed to characterize the effect of simultaneous faults (short or open circuit) in random network elements. A fault‐tolerant design of a low‐pass filter is presented for illustration.</description><subject>Analog circuits</subject><subject>Circuit design</subject><subject>Dimensional tolerances</subject><subject>Electrical impedance</subject><subject>fault resilience</subject><subject>fault‐tolerant circuits</subject><subject>filter design</subject><subject>Frequency response</subject><subject>Monte Carlo simulation</subject><subject>Network topologies</subject><subject>RC networks</subject><issn>0098-9886</issn><issn>1097-007X</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><recordid>eNp10M9KAzEQBvAgCtYq-AgBL162TpJtmhzL4j8oCFLFW0h3k5K63dQkS-nNR_AZfRJT69XTwPCb4eND6JLAiADQmzrpEaNSHqEBATkpACZvx2gAIEUhheCn6CzGFQAIyuQAvU5x2vrvz6_GrU0Xne90i58r3Jm8Du84-Y1v_XKHrQ_Y6r5N2SbfmqC7hBsT3bLD3mKd7_wS1y7UvUvxHJ1Y3UZz8TeH6OXudl49FLOn-8dqOitqKoQsyBgoWGhq2UjGc2xNLIGGLHI-IzltLEgOthRSUK6hXBDGyjGzhi204IyxIbo6_N0E_9GbmNTK9yFniYpyUQrGCB9ndX1QdfAxBmPVJri1DjtFQO1bU7k1tW8t0-JAt641u3-dqubTX_8Dq9lu8Q</recordid><startdate>202207</startdate><enddate>202207</enddate><creator>Paiva, Henrique Mohallem</creator><creator>Galvão, Roberto Kawakami Harrop</creator><creator>Hadjiloucas, Sillas</creator><creator>Yoneyama, Takashi</creator><creator>Marcolino, Matheus Henrique</creator><general>Wiley Subscription Services, Inc</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-2326-774X</orcidid><orcidid>https://orcid.org/0000-0003-2380-6114</orcidid><orcidid>https://orcid.org/0000-0001-5375-1076</orcidid><orcidid>https://orcid.org/0000-0001-9794-8815</orcidid><orcidid>https://orcid.org/0000-0001-7081-8383</orcidid></search><sort><creationdate>202207</creationdate><title>A two‐dimensional RC network topology for fault‐tolerant design of analog circuits</title><author>Paiva, Henrique Mohallem ; Galvão, Roberto Kawakami Harrop ; Hadjiloucas, Sillas ; Yoneyama, Takashi ; Marcolino, Matheus Henrique</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c2889-15020f0dc9d936329a1f10d1b000e962df0960f489826a04b133453fe3ba86333</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2022</creationdate><topic>Analog circuits</topic><topic>Circuit design</topic><topic>Dimensional tolerances</topic><topic>Electrical impedance</topic><topic>fault resilience</topic><topic>fault‐tolerant circuits</topic><topic>filter design</topic><topic>Frequency response</topic><topic>Monte Carlo simulation</topic><topic>Network topologies</topic><topic>RC networks</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Paiva, Henrique Mohallem</creatorcontrib><creatorcontrib>Galvão, Roberto Kawakami Harrop</creatorcontrib><creatorcontrib>Hadjiloucas, Sillas</creatorcontrib><creatorcontrib>Yoneyama, Takashi</creatorcontrib><creatorcontrib>Marcolino, Matheus Henrique</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>International journal of circuit theory and applications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Paiva, Henrique Mohallem</au><au>Galvão, Roberto Kawakami Harrop</au><au>Hadjiloucas, Sillas</au><au>Yoneyama, Takashi</au><au>Marcolino, Matheus Henrique</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A two‐dimensional RC network topology for fault‐tolerant design of analog circuits</atitle><jtitle>International journal of circuit theory and applications</jtitle><date>2022-07</date><risdate>2022</risdate><volume>50</volume><issue>7</issue><spage>2653</spage><epage>2659</epage><pages>2653-2659</pages><issn>0098-9886</issn><eissn>1097-007X</eissn><abstract>Summary
This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐order admittance dynamics. A Monte Carlo method is employed to describe the effect of simultaneous faults (short or open circuit) in random network elements in terms of confidence bounds in the frequency‐domain admittance profile. Faults in 10% of the elements resulted in only minor changes of the frequency response (up to 3.9 dB in magnitude and 12.5
∘ in phase in 95% of the cases). An example is presented to illustrate the use of the proposed RC network in the fault‐tolerant design of a low‐pass filter.
This paper proposes a novel two‐dimensional RC network topology that can be used as a fault‐tolerant building block for analog circuit design. The network follows simple first‐order admittance dynamics under nominal conditions. A Monte Carlo method is employed to characterize the effect of simultaneous faults (short or open circuit) in random network elements. A fault‐tolerant design of a low‐pass filter is presented for illustration.</abstract><cop>Bognor Regis</cop><pub>Wiley Subscription Services, Inc</pub><doi>10.1002/cta.3299</doi><tpages>7</tpages><orcidid>https://orcid.org/0000-0002-2326-774X</orcidid><orcidid>https://orcid.org/0000-0003-2380-6114</orcidid><orcidid>https://orcid.org/0000-0001-5375-1076</orcidid><orcidid>https://orcid.org/0000-0001-9794-8815</orcidid><orcidid>https://orcid.org/0000-0001-7081-8383</orcidid><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| source | Wiley Online Library All Journals |
| subjects | Analog circuits Circuit design Dimensional tolerances Electrical impedance fault resilience fault‐tolerant circuits filter design Frequency response Monte Carlo simulation Network topologies RC networks |
| title | A two‐dimensional RC network topology for fault‐tolerant design of analog circuits |
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