A two‐dimensional RC network topology for fault‐tolerant design of analog circuits

Summary This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐orde...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:International journal of circuit theory and applications 2022-07, Vol.50 (7), p.2653-2659
Hauptverfasser: Paiva, Henrique Mohallem, Galvão, Roberto Kawakami Harrop, Hadjiloucas, Sillas, Yoneyama, Takashi, Marcolino, Matheus Henrique
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Summary This paper proposes a novel one‐port passive circuit topology consisting of a two‐dimensional network of resistors and capacitors, which can be used as a fault‐tolerant building block for analog circuit design. Through an analytical procedure, the network is shown to follow simple first‐order admittance dynamics. A Monte Carlo method is employed to describe the effect of simultaneous faults (short or open circuit) in random network elements in terms of confidence bounds in the frequency‐domain admittance profile. Faults in 10% of the elements resulted in only minor changes of the frequency response (up to 3.9 dB in magnitude and 12.5 ∘ in phase in 95% of the cases). An example is presented to illustrate the use of the proposed RC network in the fault‐tolerant design of a low‐pass filter. This paper proposes a novel two‐dimensional RC network topology that can be used as a fault‐tolerant building block for analog circuit design. The network follows simple first‐order admittance dynamics under nominal conditions. A Monte Carlo method is employed to characterize the effect of simultaneous faults (short or open circuit) in random network elements. A fault‐tolerant design of a low‐pass filter is presented for illustration.
ISSN:0098-9886
1097-007X
DOI:10.1002/cta.3299