Limit Cycle-Free Realization of Discrete-Time Delayed Systems with External Interference and Finite Wordlength Nonlinearities

Limit Cycle-Free Realization of Discrete-Time Delayed Systems with External Interference and Finite Wordlength Nonlinearities

The paper studies the problem of exponential stability and H ∞ performance of externally interfered discrete-time systems (DTS) with time-varying delays and finite wordlength nonlinearities. The presented approach uses Wirtinger-based inequality (WBI) and reciprocally convex inequality (RCI) that ar...

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Veröffentlicht in:Circuits, systems, and signal processing systems, and signal processing, 2022-08, Vol.41 (8), p.4438-4454
Hauptverfasser: Singh, Kalpana, Kandanvli, V. Krishna Rao, Kar, Haranath
Format: Artikel
Sprache:eng
Schlagworte:
Circuits and Systems
Discrete time systems
Eigenvalues
Electrical Engineering
Electronics and Microelectronics
Engineering
Euclidean space
Inequality
Instrumentation
Interference
Nonlinearity
Signal processing
Signal,Image and Speech Processing
Stability
Time delay systems
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Beschreibung
Zusammenfassung:The paper studies the problem of exponential stability and H ∞ performance of externally interfered discrete-time systems (DTS) with time-varying delays and finite wordlength nonlinearities. The presented approach uses Wirtinger-based inequality (WBI) and reciprocally convex inequality (RCI) that are suitable to approximate the sum terms in the forward difference of Lyapunov–Krasovskii functional (LKF). The results obtained can be used to determine the exponential stability and to diminish the effects of external interference. Examples are presented to illustrate the usefulness of the obtained results.
ISSN:0278-081X
1531-5878
DOI:10.1007/s00034-022-02007-5