The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer

Computer architects have been studying the dynamically reconfigurable computer (Schaumont, Verbauwhede, Keutzer, and Sarrafzadeh, “A Quick Safari through the Reconfiguration Jungle,” in Proc. of the 38th Design Automation Conference, Las Vegas, pp. 127–177, 2001) for a number of years. New capabilities such as on-demand computing power, self-adaptiveness and self-optimization capabilities by restructuring the hardware on the fly at run-time is seen as a driving technology factor for current research initiatives such as autonomic (Kephart and Chess, Computer, 36:41–52, 2003; IBM Autonomic Computing Initiative, (http://www.research.ibm.com/autonomic/)) and organic computing (Müller-Schloer, von der Malsburg, and Würtz, Inform.-Spektrum, 27:332–336, 2004; The Organic Computing Page, (http://www.organic-computing.org)). Much research work is currently devoted to models for partial hardware module relocation (SPP1148 Reconfigurable Computing Priority Program, (http://www12.informatik.uni-erlangen.de/spprr/)) and dynamically reconfigurable hardware reconfiguration on e.g., FPGA-based platforms. However, there are many physical restrictions and technical problems limiting the scope or applicability of these approaches. This led us to the development of a new FPGA-based reconfigurable computer called the Erlangen Slot Machine. The architecture overcomes many architectural constraints of existing platforms and allows a user to partially reconfigure hardware modules arranged in so-called slots. The uniqueness of this computer stems from (a) a new slot-oriented hardware architecture, (b) a set of novel inter-module communication paradigms, and (c) concepts for dynamic and partial reconfiguration management.