A 85dB-SNDR 50 kHz bootstrapping-free resistor-less SC Delta-Sigma modulator IP block for PVT-robust low-power ADCs

This paper presents a switched-capacitor Delta-Sigma modulator (ΔΣM) IP block for low-power high-resolution ADCs. The ΔΣM IP proposal does not require any circuit calibration, internal supply bootstrapping nor resistors. A complete design methodology from architecture to CMOS circuit levels with specific optimization of the overall power consumption is included. The presented ΔΣM IP block features a remarkable robustness against both process and temperature variations. For illustrative purposes, a 50-kHz ΔΣM IP mapping example in 1.8-V 180-nm CMOS technology is presented with experimental SNDRmax>85 dB and FOMS> 160 dB while dissipating 1.4 mW. [Display omitted] •Calibration-free switched-capacitor ΔΣM IP block for low-power high-resolution ADCs.•Power-aware design methodology from architecture to CMOS circuits.•High robustness against PVT corners with deviations below 1bit.•1.8-V 180-nm CMOS realization with SNDRmax>85 dB and FOMS> 160 dB for 1.4 mW.