A Novel Auto-Write-Stopping Circuit for SHE + STT-MTJ/CMOS Hybrid ALU

A novel auto-write-stopping (AWS) circuit is proposed for magnetic tunnel junctions (MTJs) that use spin-Hall-effect-assisted spin transfer torque (SHE + STT) switching mechanism to store information when used in hybrid MTJ/CMOS circuits developed based on logic-in-memory (LIM) architecture. Continuous monitoring and AWS process of the proposed AWS circuit prevent redundant MTJ writing and eliminate unnecessary write current flow, and thereby save write energy/bit of 96.72%. Using this AWS write circuit, we have developed an AWS full adder (AWSFA), which in turn is used to develop a 1-bit hybrid arithmetic logical unit (ALU). AWSFA is better than its conventional equivalent by dissipating a lower power of 75.08%, whereas 1-bit hybrid ALU is superior to its CMOS counterpart with 39.99% and 41.61% lower power dissipation, and 24.1% and 34.28% lower power delay product (PDP) for arithmetic addition and subtraction, respectively. Furthermore, we have extended the working of hybrid ALU to perform 4-bit arithmetic addition and subtraction to demonstrate the feasibility of AWS hybrid circuits in higher bit operations. We have also conducted Monte Carlo simulations on AWS write and hybrid circuits to study its power dissipation behavior at an early design stage.