Modeling Logic Error Single-Event Cross Sections at the 7-nm Bulk FinFET Technology Node
At advanced technology nodes, single-event (SE) cross sections from logic circuits contribute significantly to the total SE cross section in sequential circuits operating at high frequencies. SE cross section for logic circuits is experimentally investigated at the 7-nm bulk FinFET node. Results for...
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| Veröffentlicht in: | IEEE transactions on nuclear science 2022-03, Vol.69 (3), p.422-428 |
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| creator | Xiong, Yoni Feeley, Alexandra T. Ball, Dennis R. Bhuva, Bharat L. |
| description | At advanced technology nodes, single-event (SE) cross sections from logic circuits contribute significantly to the total SE cross section in sequential circuits operating at high frequencies. SE cross section for logic circuits is experimentally investigated at the 7-nm bulk FinFET node. Results for threshold voltage options, supply voltage, frequency, and particle linear energy transfer (LET) are presented and compared with the 16-nm node. The model presented and validated in this work will assist designers in estimating logic SE error contributions for a variety of applications and operating conditions. |
| doi_str_mv | 10.1109/TNS.2021.3138501 |
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SE cross section for logic circuits is experimentally investigated at the 7-nm bulk FinFET node. Results for threshold voltage options, supply voltage, frequency, and particle linear energy transfer (LET) are presented and compared with the 16-nm node. The model presented and validated in this work will assist designers in estimating logic SE error contributions for a variety of applications and operating conditions.</description><identifier>ISSN: 0018-9499</identifier><identifier>EISSN: 1558-1578</identifier><identifier>DOI: 10.1109/TNS.2021.3138501</identifier><identifier>CODEN: IETNAE</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Circuits ; Cross-sections ; Energy transfer ; Engineering ; FinFET technology ; FinFETs ; frequency ; Integrated circuit modeling ; Latches ; Linear energy transfer (LET) ; Logic circuits ; Logic gates ; logic single-event (SE) errors ; Nodes ; Nuclear Science & Technology ; SE cross section ; SE upset (SEU) ; sensitive node ; Sensitivity ; Shift registers ; Technology ; Threshold voltage ; Transistors ; Voltage</subject><ispartof>IEEE transactions on nuclear science, 2022-03, Vol.69 (3), p.422-428</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. 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| subjects | Circuits Cross-sections Energy transfer Engineering FinFET technology FinFETs frequency Integrated circuit modeling Latches Linear energy transfer (LET) Logic circuits Logic gates logic single-event (SE) errors Nodes Nuclear Science & Technology SE cross section SE upset (SEU) sensitive node Sensitivity Shift registers Technology Threshold voltage Transistors Voltage |
| title | Modeling Logic Error Single-Event Cross Sections at the 7-nm Bulk FinFET Technology Node |
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