Modeling Logic Error Single-Event Cross Sections at the 7-nm Bulk FinFET Technology Node

At advanced technology nodes, single-event (SE) cross sections from logic circuits contribute significantly to the total SE cross section in sequential circuits operating at high frequencies. SE cross section for logic circuits is experimentally investigated at the 7-nm bulk FinFET node. Results for threshold voltage options, supply voltage, frequency, and particle linear energy transfer (LET) are presented and compared with the 16-nm node. The model presented and validated in this work will assist designers in estimating logic SE error contributions for a variety of applications and operating conditions.