Air-Gap Technology With a Large Void-Fraction for Global Interconnect Delay Reduction

With a goal of delay and power reduction in global buses, an air-gap technology for upper-layer interconnect is introduced. The fabrication process is discussed, utilizing {h} -BN as an air-gap capping layer to enable large voids. The suitability of an air-gap technology for integration into the up...

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Veröffentlicht in:IEEE transactions on electron devices 2021-10, Vol.68 (10), p.5078-5084
Hauptverfasser: Prawoto, Clarissa, Ma, Zichao, Xiao, Ying, Raju, Salahuddin, Chan, Mansun
Format: Artikel
Sprache:eng
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Zusammenfassung:With a goal of delay and power reduction in global buses, an air-gap technology for upper-layer interconnect is introduced. The fabrication process is discussed, utilizing {h} -BN as an air-gap capping layer to enable large voids. The suitability of an air-gap technology for integration into the upper-layer back-end-of-line (BEOL) interconnect is evaluated in terms of the void ratio to the adjacent-line spacing. Electrical measurements show that adjacent-line capacitance is reduced by 50%. Mechanical reliability is ensured by Young's modulus above BEOL requirement. Moisture uptake into air gaps is prevented using a hydrophobic capping layer. The integration of air gaps in global buses results in a 41% and 60% reduction in delay and crosstalk in the worst case switching scenario, based on parameters in the 14-nm technology node. It allows a 72% reduction in the energy-delay product with optimally designed repeaters. For the same delay, power consumption in an air-gapped global bus is reduced by requiring 4\times fewer repeaters.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2021.3105086