Low Power Analogue-Digital Converter Model

The practical aspect of nanotechnology includes the production of devices and their components needed to create, process and manipulate atoms, molecules and nanoparticles. The phenomena of aging and self-heating significantly affect the operation of microelectronic circuits. This paper developed a model of a three-bit, parallel analog-to-digital converter with low power consumption, as a result of which the circuit does not use resistors and comparators. The absence of resistors improves the static power consumption of the circuit and reduces the problems associated with aging and self-heating, while the absence of comparators has a positive effect on the dynamic power consumption. The Parallel A/D converter has been designed for a 14 nm process, at 25°C, for input signals with an amplitude of 1.8 V. The results obtained show that the developed converter uses about 100 times less energy compared to the classical architecture. Since the eight resistors were removed from the circuit, the area of the resulting converter was reduced by at least 8 R nom , where R nom = 0.7225 μm is the area of the 1 KΩ resistor.