An Offset-Cancelling Discrete-Time Analog Computer for Solving 1-D Wave Equations

This article describes a single-chip analog computer for solving 1-D wave equations. The chip uses switched-capacitor (SC)-based fully differential analog circuits to build a discrete-time but continuous-valued finite difference solver with spatially programmable wave velocity, selectable boundary c...

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Veröffentlicht in:IEEE journal of solid-state circuits 2021-09, Vol.56 (9), p.2881-2894
Hauptverfasser: Liang, Jifu, Udayanga, Nilan, Madanayake, Arjuna, Hariharan, S. I., Mandal, Soumyajit
Format: Artikel
Sprache:eng
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Zusammenfassung:This article describes a single-chip analog computer for solving 1-D wave equations. The chip uses switched-capacitor (SC)-based fully differential analog circuits to build a discrete-time but continuous-valued finite difference solver with spatially programmable wave velocity, selectable boundary conditions, and arbitrary input excitation waveforms. Correlated double sampling (CDS) and auto-zero techniques are utilized to minimize the offset and low-frequency noise of the op-amps. Built-in third-order \Delta - \Sigma modulators allow the analog solution to be easily read out by a digital processor. The design was realized in TSMC 180-nm CMOS and has an active area of 3.596 mm \times3.131 mm. The solver consumes 560 mW while providing a dynamic range (DR) of 41 dB and a computational bandwidth of either 2.5 MHz (if limited by the analog core) or 0.25 MHz (if limited by the on-chip modulators). Normalized mean squared solution errors for a typical problem (uniform medium with radiation boundary condition) range from 0.3% to 2% (−25 to −17 dB). Measured simulation times are 21\times , 5\times , and 1.3\times faster than CUDA-C code running on a modern GPU (NVIDIA GTX 1080 Ti) and MATLAB or C code running on an 8-core CPU (Intel Xeon Silver 4110 at 2.10 GHz), respectively.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2021.3074003