A 27 dB Sidelobe Suppression, 1.12 GHz BW −10 dB UWB Pulse Generator With Process Compensation

This brief presents an on-off keying (OOK) driven impulse radio ultra-wideband (IR-UWB) pulse generator (PG) for 3–5 GHz applications, featuring high sidelobe suppression (SLS), large bandwidth ([Formula Omitted]), and robustness against process variations. To eliminate the need for a dedicated off-chip pulse-shaping filter, a transistor-sizing-based pulse shaping scheme is adopted to generate a broadband pulse with a triangular envelope, ensuring enhanced SLS with extended signal bandwidth. The proposed process compensating circuit mitigates the effects of process variations on the propagation delay of the logic gates to provide stable pulse timing characteristics. Implemented in 65-nm CMOS process, the prototype PG provides a UWB pulse with an amplitude of 634 [Formula Omitted], [Formula Omitted] of 1.12 GHz, and 27 dB SLS, while occupying a total chip area of 964 [Formula Omitted] 669 [Formula Omitted]. The proposed PG provides enhanced pulse characteristics with modest energy consumption among the reported works. Based on the proposed figure-of-merit considering the SLS and quality of pulse, the PG in this work shows a competitive FOM of [Formula Omitted].