High energy-efficient switching scheme for SAR ADC with low common-mode level variation

This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switchin...

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Veröffentlicht in:Analog integrated circuits and signal processing 2021-04, Vol.107 (1), p.215-225
Hauptverfasser: Li, Xinyu, Cai, Jueping, Xin, Xin, Chen, Tengteng, Li, Zhen
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Chen, Tengteng
Li, Zhen
description This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switching energy and 86.91% reduction in capacitor area over the conventional scheme without reset energy. Compared with state-of-the-art works, the area saving is the highest. Meanwhile, the common-mode level at the comparator input is V cm except the second cycle and the last cycle during SAR ADC conversion phase, which reduces the dynamic offset of the comparator greatly.
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fullrecord <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_journals_2505390788</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>2505390788</sourcerecordid><originalsourceid>FETCH-LOGICAL-c319t-70a9c3a3669b8e0ec3d2d4240fbcfe2cf4915ed3e964c0ad607482d4b745f71c3</originalsourceid><addsrcrecordid>eNp9kF1LwzAUhoMoOKd_wKuA19GTpm2ayzE_JgwEP_AydOlJ29E2M-kc26-3WsE7r87F-7zvgYeQSw7XHEDeBA6xBAYRZ8ClkuxwRCY8kYJxJdUxmYCKEsZBwCk5C2ENAJGMYULeF3VZUezQl3uG1tamxq6nYVf3pqq7kgZTYYvUOk9fZs90djunQ1bRxu2ocW3rOta6AmmDn9jQz9zXeV-77pyc2LwJePF7p-Tt_u51vmDLp4fH-WzJjOCqZxJyZUQu0lStMgQ0ooiKOIrBrozFyNhY8QQLgSqNDeRFCjLOBmIl48RKbsSUXI27G-8-thh6vXZb3w0vdZRAIhTILBuoaKSMdyF4tHrj6zb3e81BfwvUo0A9CNQ_AvVhKImxFAa4K9H_Tf_T-gKakXPr</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2505390788</pqid></control><display><type>article</type><title>High energy-efficient switching scheme for SAR ADC with low common-mode level variation</title><source>Springer Nature - Complete Springer Journals</source><creator>Li, Xinyu ; Cai, Jueping ; Xin, Xin ; Chen, Tengteng ; Li, Zhen</creator><creatorcontrib>Li, Xinyu ; Cai, Jueping ; Xin, Xin ; Chen, Tengteng ; Li, Zhen</creatorcontrib><description>This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switching energy and 86.91% reduction in capacitor area over the conventional scheme without reset energy. Compared with state-of-the-art works, the area saving is the highest. Meanwhile, the common-mode level at the comparator input is V cm except the second cycle and the last cycle during SAR ADC conversion phase, which reduces the dynamic offset of the comparator greatly.</description><identifier>ISSN: 0925-1030</identifier><identifier>EISSN: 1573-1979</identifier><identifier>DOI: 10.1007/s10470-021-01797-z</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>Analog to digital conversion ; Analog to digital converters ; Capacitors ; Circuits and Systems ; Electrical Engineering ; Energy conservation ; Energy efficiency ; Engineering ; Mixed Signal Letter ; Signal,Image and Speech Processing ; Switching</subject><ispartof>Analog integrated circuits and signal processing, 2021-04, Vol.107 (1), p.215-225</ispartof><rights>The Author(s), under exclusive licence to Springer Science+Business Media, LLC part of Springer Nature 2021</rights><rights>The Author(s), under exclusive licence to Springer Science+Business Media, LLC part of Springer Nature 2021.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c319t-70a9c3a3669b8e0ec3d2d4240fbcfe2cf4915ed3e964c0ad607482d4b745f71c3</citedby><cites>FETCH-LOGICAL-c319t-70a9c3a3669b8e0ec3d2d4240fbcfe2cf4915ed3e964c0ad607482d4b745f71c3</cites><orcidid>0000-0002-1852-0982</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://link.springer.com/content/pdf/10.1007/s10470-021-01797-z$$EPDF$$P50$$Gspringer$$H</linktopdf><linktohtml>$$Uhttps://link.springer.com/10.1007/s10470-021-01797-z$$EHTML$$P50$$Gspringer$$H</linktohtml><link.rule.ids>314,777,781,27905,27906,41469,42538,51300</link.rule.ids></links><search><creatorcontrib>Li, Xinyu</creatorcontrib><creatorcontrib>Cai, Jueping</creatorcontrib><creatorcontrib>Xin, Xin</creatorcontrib><creatorcontrib>Chen, Tengteng</creatorcontrib><creatorcontrib>Li, Zhen</creatorcontrib><title>High energy-efficient switching scheme for SAR ADC with low common-mode level variation</title><title>Analog integrated circuits and signal processing</title><addtitle>Analog Integr Circ Sig Process</addtitle><description>This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switching energy and 86.91% reduction in capacitor area over the conventional scheme without reset energy. Compared with state-of-the-art works, the area saving is the highest. Meanwhile, the common-mode level at the comparator input is V cm except the second cycle and the last cycle during SAR ADC conversion phase, which reduces the dynamic offset of the comparator greatly.</description><subject>Analog to digital conversion</subject><subject>Analog to digital converters</subject><subject>Capacitors</subject><subject>Circuits and Systems</subject><subject>Electrical Engineering</subject><subject>Energy conservation</subject><subject>Energy efficiency</subject><subject>Engineering</subject><subject>Mixed Signal Letter</subject><subject>Signal,Image and Speech Processing</subject><subject>Switching</subject><issn>0925-1030</issn><issn>1573-1979</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><recordid>eNp9kF1LwzAUhoMoOKd_wKuA19GTpm2ayzE_JgwEP_AydOlJ29E2M-kc26-3WsE7r87F-7zvgYeQSw7XHEDeBA6xBAYRZ8ClkuxwRCY8kYJxJdUxmYCKEsZBwCk5C2ENAJGMYULeF3VZUezQl3uG1tamxq6nYVf3pqq7kgZTYYvUOk9fZs90djunQ1bRxu2ocW3rOta6AmmDn9jQz9zXeV-77pyc2LwJePF7p-Tt_u51vmDLp4fH-WzJjOCqZxJyZUQu0lStMgQ0ooiKOIrBrozFyNhY8QQLgSqNDeRFCjLOBmIl48RKbsSUXI27G-8-thh6vXZb3w0vdZRAIhTILBuoaKSMdyF4tHrj6zb3e81BfwvUo0A9CNQ_AvVhKImxFAa4K9H_Tf_T-gKakXPr</recordid><startdate>20210401</startdate><enddate>20210401</enddate><creator>Li, Xinyu</creator><creator>Cai, Jueping</creator><creator>Xin, Xin</creator><creator>Chen, Tengteng</creator><creator>Li, Zhen</creator><general>Springer US</general><general>Springer Nature B.V</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7TG</scope><scope>8FD</scope><scope>KL.</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-1852-0982</orcidid></search><sort><creationdate>20210401</creationdate><title>High energy-efficient switching scheme for SAR ADC with low common-mode level variation</title><author>Li, Xinyu ; Cai, Jueping ; Xin, Xin ; Chen, Tengteng ; Li, Zhen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c319t-70a9c3a3669b8e0ec3d2d4240fbcfe2cf4915ed3e964c0ad607482d4b745f71c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Analog to digital conversion</topic><topic>Analog to digital converters</topic><topic>Capacitors</topic><topic>Circuits and Systems</topic><topic>Electrical Engineering</topic><topic>Energy conservation</topic><topic>Energy efficiency</topic><topic>Engineering</topic><topic>Mixed Signal Letter</topic><topic>Signal,Image and Speech Processing</topic><topic>Switching</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Li, Xinyu</creatorcontrib><creatorcontrib>Cai, Jueping</creatorcontrib><creatorcontrib>Xin, Xin</creatorcontrib><creatorcontrib>Chen, Tengteng</creatorcontrib><creatorcontrib>Li, Zhen</creatorcontrib><collection>CrossRef</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Meteorological &amp; Geoastrophysical Abstracts</collection><collection>Technology Research Database</collection><collection>Meteorological &amp; Geoastrophysical Abstracts - Academic</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Analog integrated circuits and signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Li, Xinyu</au><au>Cai, Jueping</au><au>Xin, Xin</au><au>Chen, Tengteng</au><au>Li, Zhen</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>High energy-efficient switching scheme for SAR ADC with low common-mode level variation</atitle><jtitle>Analog integrated circuits and signal processing</jtitle><stitle>Analog Integr Circ Sig Process</stitle><date>2021-04-01</date><risdate>2021</risdate><volume>107</volume><issue>1</issue><spage>215</spage><epage>225</epage><pages>215-225</pages><issn>0925-1030</issn><eissn>1573-1979</eissn><abstract>This letter presents a novel high energy-efficient switching scheme with low common-mode level variation for successive approximation register (SAR) analog-to-digital converters. Benefit from the merge capacitor split and C-2C techniques, the proposed switching scheme achieves 98% saving in switching energy and 86.91% reduction in capacitor area over the conventional scheme without reset energy. Compared with state-of-the-art works, the area saving is the highest. Meanwhile, the common-mode level at the comparator input is V cm except the second cycle and the last cycle during SAR ADC conversion phase, which reduces the dynamic offset of the comparator greatly.</abstract><cop>New York</cop><pub>Springer US</pub><doi>10.1007/s10470-021-01797-z</doi><tpages>11</tpages><orcidid>https://orcid.org/0000-0002-1852-0982</orcidid></addata></record>
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subjects Analog to digital conversion
Analog to digital converters
Capacitors
Circuits and Systems
Electrical Engineering
Energy conservation
Energy efficiency
Engineering
Mixed Signal Letter
Signal,Image and Speech Processing
Switching
title High energy-efficient switching scheme for SAR ADC with low common-mode level variation
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T22%3A04%3A18IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=High%20energy-efficient%20switching%20scheme%20for%20SAR%20ADC%20with%20low%20common-mode%20level%20variation&rft.jtitle=Analog%20integrated%20circuits%20and%20signal%20processing&rft.au=Li,%20Xinyu&rft.date=2021-04-01&rft.volume=107&rft.issue=1&rft.spage=215&rft.epage=225&rft.pages=215-225&rft.issn=0925-1030&rft.eissn=1573-1979&rft_id=info:doi/10.1007/s10470-021-01797-z&rft_dat=%3Cproquest_cross%3E2505390788%3C/proquest_cross%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_pqid=2505390788&rft_id=info:pmid/&rfr_iscdi=true