A study of phase noise suppression in reference multiple digital PLL without DLLs

In order to suppress the spurious signal resulted from the reference leak and to decrease the oscillator jitter by using phase locked loop (PLL) loop band extension, a reference frequency multiplier that places a delay locked loop (DLL) in front of the PLL has been studied. However, a feedback circu...

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Veröffentlicht in:Analog integrated circuits and signal processing 2021-02, Vol.106 (2), p.441-447
Hauptverfasser: Kato, Takahiro, Yasuda, Akira
Format: Artikel
Sprache:eng
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Zusammenfassung:In order to suppress the spurious signal resulted from the reference leak and to decrease the oscillator jitter by using phase locked loop (PLL) loop band extension, a reference frequency multiplier that places a delay locked loop (DLL) in front of the PLL has been studied. However, a feedback circuit such as a DLL or an injection locked type voltage controlled oscillator must be used. In this paper, we propose a novel digital PLL capable of reference frequency multiplication without a feedback circuit. Simulink estimated the phase noise improved by − 17 dB at 1 MHz offset, and the spurious tones due to device variation reduced by − 12 dB with a dynamic element matching.
ISSN:0925-1030
1573-1979
DOI:10.1007/s10470-020-01757-z