PI-Based Synchronous Reference Frame Frequency-Locked Loop

A novel proportional-integral (PI)-based frequency-locked loop (FLL) is proposed and verified in this letter. Unlike the conventional FLL, which is implemented in the stationary ( αβ ) reference frame, the proposed PI-based FLL (PI-FLL) is implemented in the synchronous ( dq ) reference frame. A Lya...

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Veröffentlicht in:	IEEE transactions on industrial electronics (1982) 2021-05, Vol.68 (5), p.4547-4553
Hauptverfasser:	Quan, Xiangjun, Huang, Alex Q.
Format:	Artikel
Sprache:	eng
Schlagworte:	Automation & Control Systems Complex filter Design parameters Digital signal processors Engineering Engineering, Electrical & Electronic Floating point arithmetic Frequency estimation Frequency locked loops Frequency locking Frequency synchronization frequency-locked loop (FLL) Instruments & Instrumentation inverter control Microprocessors Nonlinear dynamical systems Phase locked loops phase-locked loop (PLL) Power system stability Science & Technology Signal processing Stability analysis synchronization Technology
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Beschreibung
Zusammenfassung:	A novel proportional-integral (PI)-based frequency-locked loop (FLL) is proposed and verified in this letter. Unlike the conventional FLL, which is implemented in the stationary ( αβ ) reference frame, the proposed PI-based FLL (PI-FLL) is implemented in the synchronous ( dq ) reference frame. A Lyapunov candidate is constructed to prove the stability of the PI-FLL. In addition, a linear model is established to facilitate the parameter design of the PI-FLL. With the selected parameters, the performance of the proposed FLL is improved. Finally, the proposed PI-FLL is experimentally verified on a testbed using a 32-bit floating-point digital signal processor TMS320F28379D at 200 MHz.
ISSN:	0278-0046 1557-9948
DOI:	10.1109/TIE.2020.2985002