Development of highly reliable BiFeO3/HfO2/Silicon gate stacks for ferroelectric non-volatile memories in IoT applications

We have investigated the structural, electrical, and ferroelectric properties of metal–ferroelectric-high-k-silicon capacitors with BiFeO 3 ferroelectric films deposited on the HfO 2 /Si substrate. BiFeO 3 , HfO 2 films, and their stack were deposited on the silicon substrate using RF magnetron sputtering and plasma-enhanced atomic layer deposition (PEALD). Film crystal orientation, refractive index, and absorption constant parameters were extracted from X-ray diffraction and ellipsometric analysis. Electrical characterization of metal/ferroelectric/metal (MFM), metal/ferroelectric/silicon (MFS), metal/dielectric/silicon (MIS), and metal/ferroelectric/insulator/silicon (MFIS) capacitor structures provide memory window, leakage current density, hysteresis, fatigue, and data retention time. The metal/ferroelectric/silicon structure exhibits clockwise capacitance–voltage characteristics with the memory window of 5.04 V for the bias voltage of ± 10 V. The electrical and ferroelectric characteristics of MFIS structures were studied for different thicknesses of HfO 2 layer, which shows that the introduction of high-k dielectric film between ferroelectric and silicon improves the interface quality. The memory window of the MFIS structure was found to significantly increase to 9.65 V with the introduction of a 10 nm HfO 2 layer between the ferroelectric layer and the silicon substrate. Two-order reduction in the leakage current density was also observed in the MF (200 nm) I (10 nm) S structure as compared to the MF (200 nm) S structure. The fabricated MF (200 nm) I (10 nm) S gate stack shows fatigue resistance for read/write operations greater than 10 12 cycles and data retention time for greater than 10 4 s. To the best of author’s knowledge, this is the first investigation to integrate pure BiFeO 3 on PEALD-HfO 2 dielectric for the gate stack of ferroelectric field effect transistors.