Communication-less protection scheme for AC microgrids using hybrid tripping characteristic

•A communication-less protection scheme for AC microgrid•A novel hybrid tripping characteristic based relay for protection•Fixed grading of relays independent of operating modes of microgrid•Less relay operating time in low fault current by hybrid tripping characteristic Conventional protection sche...

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Veröffentlicht in:Electric power systems research 2020-10, Vol.187, p.106453, Article 106453
Hauptverfasser: Chakraborty, Soham, Das, Sarasij
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Sprache:eng
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Zusammenfassung:•A communication-less protection scheme for AC microgrid•A novel hybrid tripping characteristic based relay for protection•Fixed grading of relays independent of operating modes of microgrid•Less relay operating time in low fault current by hybrid tripping characteristic Conventional protection schemes are not effective in microgrids due to the possibility of bi-directional current flow and fault level reduction in the islanded mode caused by converter interfaced Distributed Generations (DGs). This paper proposes a hybrid tripping characteristic based protection scheme for microgrids. The proposed characteristic uses both voltage and current measurements to decide the tripping time, thus it is called hybrid tripping characteristic. Same relay setting is used in both grid connected and islanded mode of operation of the microgrid. Therefore, communication facilities are not required in the proposed scheme unlike many existing communication-based solutions. Voltage measurement helps in differentiating low-fault-current situation from overloading condition. It also helps in the reduction of the operating time in islanded mode. Acceptable relay operating time is achieved in both grid connected and islanded mode. A coordination problem is formulated and solved with the proposed hybrid characteristic. The obtained protection coordination is independent of the operating mode of the microgrid. The performance of the scheme is evaluated using both PSCAD simulations and hardware experiments. It is found that the proposed protection scheme performs satisfactorily for various fault impedance values, fault locations, DG combinations, overload situations and measurement errors. The performance of the scheme has been compared with the existing schemes.
ISSN:0378-7796
1873-2046
DOI:10.1016/j.epsr.2020.106453