P‐190: Late‐News‐Poster: Micrometer‐scale Patterning of Self‐assembled SWCNT Films and Thin‐Film Transistors Using Patterned PLL Layer

P‐190: Late‐News‐Poster: Micrometer‐scale Patterning of Self‐assembled SWCNT Films and Thin‐Film Transistors Using Patterned PLL Layer

We present micrometer‐scale patterning technologies of PLL layer for solution‐processed SWCNT‐TFTs. Our micrometer‐scale patterning technology allowed for fine feature fabrication down to micrometer‐scale. We also demonstrated the TFTs based on the patterned PLL layer for low‐voltage operation....

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Veröffentlicht in:SID International Symposium Digest of technical papers 2020-08, Vol.51 (1), p.2117-2120
Hauptverfasser: Park, Boik, Jang, Jongsu, Kim, Hyeonggyu, Seo, Jiseok, Yoo, Hyunjun, Kim, Taehoon, Hong, Yongtaek
Format: Artikel
Sprache:eng
Schlagworte:
patterned PLL layer
PDMS stamp
Semi-SWCNTs
solution-processed SWCNT-TFTs
SWCNTs film
Thin films
Transistors
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Beschreibung
Zusammenfassung:We present micrometer‐scale patterning technologies of PLL layer for solution‐processed SWCNT‐TFTs. Our micrometer‐scale patterning technology allowed for fine feature fabrication down to micrometer‐scale. We also demonstrated the TFTs based on the patterned PLL layer for low‐voltage operation.
ISSN:0097-966X
2168-0159
DOI:10.1002/sdtp.14341