Enhanced comparator‐based switched‐capacitor integrator using current conveyor

New schematic for comparator‐based switched‐capacitor (CBSC) integrator is proposed. In comparison with conventional CBSC integrators, the presented circuit helps to reduce significantly the power consumption while improving the signal‐to‐noise ratio (SNR) and the defined figure of merit (FOM). This was obtained by using a second‐generation current conveyor (CCII) in charge scheme. The integrator design is based on the 0.18‐μm CMOS technology with a frequency of 5 MHz; the proposed first‐order CBSC integrator exhibits 22.87 dB as SNR and 60 μW as power dissipation at 1.8‐V supply voltage.