A 0.35 V-to-1.0 V synthesizable rail-to-rail dynamic voltage comparator based OAI&AOI logic

In this letter, we present a two-stage rail-to-rail fully synthesizable dynamic voltage comparator. To improve the speed and mismatch performance of the NAND & NOR -based synthesizable comparator, we have proposed to replace these logics with OAI & AOI logic gates, respectively. The comparator is implemented on CMOS 45 nm technology, operating with a supply voltage from 350 mV to 1.0 V. The proposed comparator has reduced the delay by 2–11 × , reduced the standard deviation of offset by 1.09–1.39 × , and reduced the power consumption up to 3.80 × compared to the NAND –& NOR -based comparator. Hence, these improvements can be used to further advance the performance of all-digital synthesizable design circuits.