Fault Current Constraint Transmission Expansion Planning Based on the Inverse Matrix Modification Lemma and a Valid Inequality
In the transmission expansion planning (TEP) problem, it is challenging to consider a fault current level constraint due to the time-consuming update process of the bus impedance matrix, which is required to calculate the fault currents during the search for the optimal solution. In the existing stu...
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Veröffentlicht in: | Energies (Basel) 2019-12, Vol.12 (24), p.4769 |
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Sprache: | eng |
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Zusammenfassung: | In the transmission expansion planning (TEP) problem, it is challenging to consider a fault current level constraint due to the time-consuming update process of the bus impedance matrix, which is required to calculate the fault currents during the search for the optimal solution. In the existing studies, either a nonlinear update equation or its linearized version is used to calculate the updated bus impedance matrix. In the former case, there is a problem in that the mathematical formulation is derived in the form of mixed-integer nonlinear programming. In the latter case, there is a problem in that an error due to the linearization may exist and the change of fault currents in other buses that are not connected to the new transmission lines cannot be detected. In this paper, we use a method to obtain the exact updated bus impedance matrix directly from the inversion of the bus admittance matrix. We propose a novel method based on the inverse matrix modification lemma (IMML) and a valid inequality is proposed to find a better solution to the TEP problem with fault current level constraint. The proposed method is applied to the IEEE two-area reliability test system with 96 buses to verify the performance and effectiveness of the proposed method and we compare the results with the existing methods. Simulation results show that the existing TEP method based on impedance matrix modification method violates the fault current level constraint in some buses, while the proposed method satisfies the constraint in all buses in a reasonable computation time. |
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ISSN: | 1996-1073 1996-1073 |
DOI: | 10.3390/en12244769 |