A novel memristive true random number generator design

Purpose In this work, a true random number generator is designed by sampling the double-scroll analog continuous-time chaotic circuit signals. Methodology A Chua circuit based on memristance simulator is designed to obtain a non-linear term for a chaotic dynamic system. It is implemented on the board by using commercially available integrated circuits and passive elements. A low precision ADC which is commonly found in the market is used to sample the chaotic signals. The mathematical analysis of the chaotic circuit is verified by experimental results. Originality It is aimed to be one of the pioneering studies (including low precision ADC) in the literature on the implementation of memristive chaotic random number generators. Findings Two new methods are proposed for post-processing and creating random bit array using XOR operator and J-K flip flop. The bit stream obtained by a full-hardware implementation successfully passed the NIST-800-22 test. In this respect, the availability of the memristance simulator circuit, memristive chaotic double-scroll attractor, proposed random bit algorithm and the randomness of the memristive analog continuous-time chaotic true number generator were also verified.