Simulation environment for link energy estimation in networks-on-chip with virtual channels

Network-on-chip (NoC) is the most promising design paradigm for the interconnect architecture of a multiprocessor system-on-chip (MPSoC). On the downside, a NoC has a significant impact on the overall energy consumption of the system. NoC simulators are highly relevant for design space exploration even at an early stage. Since links in NoC consume up to 50% of the energy, a realistic energy consumption of links in NoC simulators is important. This work presents a simulation environment which implements a technique to precisely estimate the data dependent link energy consumption in NoCs with virtual channels for the first time. Our model works at a high level of abstraction, making it feasible to estimate the energy requirements at an early design stage. Additionally, it enables the fast evaluation and early exploration of low-power coding techniques. The presented model is applicable for 2D and 3D NoCs. A case study for an image processing application shows that the current link model leads to an underestimate of the link energy consumption by up to a factor of four. In contrast, the technique presented in this paper estimates the energy quantities precisely with an error below 1% compared to results obtained by precise, but computational extensive, bit-level simulation. •We present the first high-level model to estimate link energy for Networks-on-Chip with virtual channels at high accuracy.•Our high-level model has an error below 1% compared to precise, but computational expensive, bit-level simulations.•We contribute a Network-on-Chip simulator to provide detailed energy and performance evaluation at an early design stage.•We (re-)analyze codings in Networks-on-Chip with virtual channels as current models underestimate energy by a factor four.