Design and implementation of a digital down/up conversion directly from/to RF channels in HDL
The paper presents the design and implementation of a Digital Down Converter (DDC) and a Digital Up Converter (DUC) directly from/to RF channels. The project uses multi-stage decimation and interpolation by means of recursive Cascaded Integrator-Comb (CIC) filters and polyphase filters in HDL. The d...
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Veröffentlicht in: | Integration (Amsterdam) 2019-09, Vol.68, p.30-37 |
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creator | Motta, Lucas Lui Acuña Acurio, Byron Alejandro Aniceto, Nathália Figueiredo Tinoco Meloni, Luís Geraldo P. |
description | The paper presents the design and implementation of a Digital Down Converter (DDC) and a Digital Up Converter (DUC) directly from/to RF channels. The project uses multi-stage decimation and interpolation by means of recursive Cascaded Integrator-Comb (CIC) filters and polyphase filters in HDL. The design incorporates a Spectral Emission Mask (SEM) for the Internet of Things (IoT) IEEE 802.11ah Wi-Fi HaLow standard. Although the designs were implemented for 16 MHz-bandwidth in the 900 MHz frequency band, they are flexible and they can be easily adapted for other communications systems. The converter designs use HDL Coder for several fixed-point word-length representation of coefficients presenting its impact on performance. In the simulations, the DDC/DUC frequency responses were evaluated using high-level models showing that the equivalent filter design meets the requirements of the spectral mask by an appropriated representation of the fixed-point data types. The paper also shows a reformulation of the internal fixed-point data types used at the filter structures.
•Design of digital down/up converter directly from/to RF channels.•Complete DDC and DUC design equations and technical concepts.•DDC and DUC FPGA implementation with spectral emission mask.•CIC and polyphase filter implementation well-adapted to FPGA/VLSI designs.•The designs are flexible and can be easily adapted to other communications systems. |
doi_str_mv | 10.1016/j.vlsi.2019.05.006 |
format | Article |
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•Design of digital down/up converter directly from/to RF channels.•Complete DDC and DUC design equations and technical concepts.•DDC and DUC FPGA implementation with spectral emission mask.•CIC and polyphase filter implementation well-adapted to FPGA/VLSI designs.•The designs are flexible and can be easily adapted to other communications systems.</description><identifier>ISSN: 0167-9260</identifier><identifier>EISSN: 1872-7522</identifier><identifier>DOI: 10.1016/j.vlsi.2019.05.006</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Bandwidths ; Channels ; CIC ; Computer simulation ; Converters ; DUC/DDC ; Filter design (mathematics) ; FPGA ; Frequencies ; Internet of Things ; Interpolation ; Radio frequency ; Representations ; Spectral emission ; Wi-Fi HaLow mask</subject><ispartof>Integration (Amsterdam), 2019-09, Vol.68, p.30-37</ispartof><rights>2019 Elsevier B.V.</rights><rights>Copyright Elsevier BV Sep 2019</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c328t-502368cda10edf177351f25d9e0b20a02041e16d5f39bdde7b16f003a9b5a03</citedby><cites>FETCH-LOGICAL-c328t-502368cda10edf177351f25d9e0b20a02041e16d5f39bdde7b16f003a9b5a03</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/j.vlsi.2019.05.006$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>315,782,786,3552,27931,27932,46002</link.rule.ids></links><search><creatorcontrib>Motta, Lucas Lui</creatorcontrib><creatorcontrib>Acuña Acurio, Byron Alejandro</creatorcontrib><creatorcontrib>Aniceto, Nathália Figueiredo Tinoco</creatorcontrib><creatorcontrib>Meloni, Luís Geraldo P.</creatorcontrib><title>Design and implementation of a digital down/up conversion directly from/to RF channels in HDL</title><title>Integration (Amsterdam)</title><description>The paper presents the design and implementation of a Digital Down Converter (DDC) and a Digital Up Converter (DUC) directly from/to RF channels. The project uses multi-stage decimation and interpolation by means of recursive Cascaded Integrator-Comb (CIC) filters and polyphase filters in HDL. The design incorporates a Spectral Emission Mask (SEM) for the Internet of Things (IoT) IEEE 802.11ah Wi-Fi HaLow standard. Although the designs were implemented for 16 MHz-bandwidth in the 900 MHz frequency band, they are flexible and they can be easily adapted for other communications systems. The converter designs use HDL Coder for several fixed-point word-length representation of coefficients presenting its impact on performance. In the simulations, the DDC/DUC frequency responses were evaluated using high-level models showing that the equivalent filter design meets the requirements of the spectral mask by an appropriated representation of the fixed-point data types. The paper also shows a reformulation of the internal fixed-point data types used at the filter structures.
•Design of digital down/up converter directly from/to RF channels.•Complete DDC and DUC design equations and technical concepts.•DDC and DUC FPGA implementation with spectral emission mask.•CIC and polyphase filter implementation well-adapted to FPGA/VLSI designs.•The designs are flexible and can be easily adapted to other communications systems.</description><subject>Bandwidths</subject><subject>Channels</subject><subject>CIC</subject><subject>Computer simulation</subject><subject>Converters</subject><subject>DUC/DDC</subject><subject>Filter design (mathematics)</subject><subject>FPGA</subject><subject>Frequencies</subject><subject>Internet of Things</subject><subject>Interpolation</subject><subject>Radio frequency</subject><subject>Representations</subject><subject>Spectral emission</subject><subject>Wi-Fi HaLow mask</subject><issn>0167-9260</issn><issn>1872-7522</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><recordid>eNp9kF1LwzAUhoMoOD_-gFcBr9udpEvTgjeyOScMBPVWQtqczowumUk32b-3pV57dS7O-5zD-xByxyBlwPLpNj220aYcWJmCSAHyMzJhheSJFJyfk0kfkknJc7gkVzFuAYDNpJiQzwVGu3FUO0Ptbt_iDl2nO-sd9Q3V1NiN7XRLjf9x08Oe1t4dMcRhb2zAumtPtAl-N-08fVvS-ks7h22k1tHVYn1DLhrdRrz9m9fkffn0MV8l69fnl_njOqkzXnSJAJ7lRW00AzQNkzITrOHClAgVBw0cZgxZbkSTlZUxKCuWNwCZLiuhIbsm9-PVffDfB4yd2vpDcP1DxXkhZ6Io5JDiY6oOPsaAjdoHu9PhpBioQaLaqkGiGiQqEKqX2EMPI9R3wqPFoGJt0dU4llfG2__wXzeserA</recordid><startdate>201909</startdate><enddate>201909</enddate><creator>Motta, Lucas Lui</creator><creator>Acuña Acurio, Byron Alejandro</creator><creator>Aniceto, Nathália Figueiredo Tinoco</creator><creator>Meloni, Luís Geraldo P.</creator><general>Elsevier B.V</general><general>Elsevier BV</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>201909</creationdate><title>Design and implementation of a digital down/up conversion directly from/to RF channels in HDL</title><author>Motta, Lucas Lui ; Acuña Acurio, Byron Alejandro ; Aniceto, Nathália Figueiredo Tinoco ; Meloni, Luís Geraldo P.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c328t-502368cda10edf177351f25d9e0b20a02041e16d5f39bdde7b16f003a9b5a03</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Bandwidths</topic><topic>Channels</topic><topic>CIC</topic><topic>Computer simulation</topic><topic>Converters</topic><topic>DUC/DDC</topic><topic>Filter design (mathematics)</topic><topic>FPGA</topic><topic>Frequencies</topic><topic>Internet of Things</topic><topic>Interpolation</topic><topic>Radio frequency</topic><topic>Representations</topic><topic>Spectral emission</topic><topic>Wi-Fi HaLow mask</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Motta, Lucas Lui</creatorcontrib><creatorcontrib>Acuña Acurio, Byron Alejandro</creatorcontrib><creatorcontrib>Aniceto, Nathália Figueiredo Tinoco</creatorcontrib><creatorcontrib>Meloni, Luís Geraldo P.</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Integration (Amsterdam)</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Motta, Lucas Lui</au><au>Acuña Acurio, Byron Alejandro</au><au>Aniceto, Nathália Figueiredo Tinoco</au><au>Meloni, Luís Geraldo P.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Design and implementation of a digital down/up conversion directly from/to RF channels in HDL</atitle><jtitle>Integration (Amsterdam)</jtitle><date>2019-09</date><risdate>2019</risdate><volume>68</volume><spage>30</spage><epage>37</epage><pages>30-37</pages><issn>0167-9260</issn><eissn>1872-7522</eissn><abstract>The paper presents the design and implementation of a Digital Down Converter (DDC) and a Digital Up Converter (DUC) directly from/to RF channels. The project uses multi-stage decimation and interpolation by means of recursive Cascaded Integrator-Comb (CIC) filters and polyphase filters in HDL. The design incorporates a Spectral Emission Mask (SEM) for the Internet of Things (IoT) IEEE 802.11ah Wi-Fi HaLow standard. Although the designs were implemented for 16 MHz-bandwidth in the 900 MHz frequency band, they are flexible and they can be easily adapted for other communications systems. The converter designs use HDL Coder for several fixed-point word-length representation of coefficients presenting its impact on performance. In the simulations, the DDC/DUC frequency responses were evaluated using high-level models showing that the equivalent filter design meets the requirements of the spectral mask by an appropriated representation of the fixed-point data types. The paper also shows a reformulation of the internal fixed-point data types used at the filter structures.
•Design of digital down/up converter directly from/to RF channels.•Complete DDC and DUC design equations and technical concepts.•DDC and DUC FPGA implementation with spectral emission mask.•CIC and polyphase filter implementation well-adapted to FPGA/VLSI designs.•The designs are flexible and can be easily adapted to other communications systems.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/j.vlsi.2019.05.006</doi><tpages>8</tpages></addata></record> |
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subjects | Bandwidths Channels CIC Computer simulation Converters DUC/DDC Filter design (mathematics) FPGA Frequencies Internet of Things Interpolation Radio frequency Representations Spectral emission Wi-Fi HaLow mask |
title | Design and implementation of a digital down/up conversion directly from/to RF channels in HDL |
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