Simulation Study of Overlap Capacitance in Source-Gated Transistors for Current-Mode Pixel Drivers

Contrary to conventional design principles, current-driven pixel drivers based on source-gated transistors (SGTs) achieve their optimal drive current and speed with a deliberate 5-10- \mu \text{m} gate-source overlap. Total pixel circuit area need not increase, as the additional device area can be...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE electron device letters 2019-09, Vol.40 (9), p.1451-1454
Hauptverfasser: Drury, Raymond, Bestelink, Eva, Sporea, Radu A.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!