A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training

In this paper, we propose an adaptive-bias-training circuit for enhancing the read reliability of ternary content-addressable memory (TCAM), which is implemented with resistive nonvolatile memories such as spin-torque transfer magnetic random access memory (STT-MRAM) and PRAM. The 3T2R nonvolatile-based TCAM (nvTCAM) is area-efficient, yet vulnerable to the process variation with fixed bias condition that affects the sensing margin. With adaptive bias training, the 3T2R nvTCAM cell can maintain a sufficient sensing margin when combined with a high-performance STT-MRAM with a resistance ratio (R-ratio) as low as 3.0. The foreground train followed by the on-the-fly track compensates for variations in the resistances of memory cells, threshold voltage, and substrate temperature. We evaluated the proposed bias technique using the 180-nm CMOS process with 1.8 V of VDD. The search speed is enhanced by 50% at a 64-bit word length, and the sensing margin is improved by 20%. Using our proposed bias technique, the read error rate induced by the variability is estimated to be contained below 1 ppb at an R-ratio of 2, indicating the decent productivity of gigabit density nvTCAM with STT-MRAM.