Linear Matrix Inequalities for Digital Redesign Under Delay Suitable for PI Controllers with Application to PMSMs

This paper investigates the digital redesign of proportional integral (PI) controllers implemented under a delay of one sampling period. The usual digital redesign based on state matching cannot be directly applied here. The digital control gains are obtained by means of linear matrix inequalities that minimize the H ∞ norm associated with an error signal defined as the difference between the closed-loop system with continuous-time controller and the closed-loop system with the discrete-time controller implemented under the delay. Three synthesis conditions are given, exploring extra matrix variables and suitable matrix structures to provide more efficient redesigns that can deal even with large control delays in the implementation of the redesigned controller. As a contribution, the proposed conditions provide a theoretical guarantee that digital PIs, operating under delay, will perform very close to originally designed continuous-time PIs. A numerical example illustrates the efficiency of the proposed conditions, and a practical application for permanent magnet synchronous motor speed regulation shows good experimental results, illustrating the viability of the proposal.