An operating system accelerator

A RISC-style hardware accelerator for operating systems (OS), named the mechanism of multiprocessing (MMP) processor, is presented. The MMP processor implements the set of MMP primitives of the MMP mechanism with which the ES operating was enhanced. The architecture and organisation of this processo...

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Veröffentlicht in:Journal of systems architecture 1998-06, Vol.44 (9), p.737-754
Hauptverfasser: DJORDJEVIC, J, TOMASEVIC, M, BOJOVIC, M, POTIC, V, RANDJIC, S
Format: Artikel
Sprache:eng
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Zusammenfassung:A RISC-style hardware accelerator for operating systems (OS), named the mechanism of multiprocessing (MMP) processor, is presented. The MMP processor implements the set of MMP primitives of the MMP mechanism with which the ES operating was enhanced. The architecture and organisation of this processor were devised to facilitate fast execution of the MMP primitives. The architecture adopted ensures the efficient mapping of typical operations and data structures used in the MMP primitives. The hardware resources were selected and interconnected in such a way that, with pipelined control, the organisation envisaged can support their fast execution. The prototype of the MMP processor was developed and put into operation with the extensive usage of the interactive development and testing (INDAT) system, a specially designed tool for the development and testing of the MMP processor.
ISSN:1383-7621
1873-6165
DOI:10.1016/S1383-7621(97)00043-X