15 GHz Doherty Power Amplifier With RF Predistortion Linearizer in CMOS SOI

A two-stage, high-power symmetric Doherty power amplifier (PA) at 15 GHz is presented. The PA is implemented in 45 nm CMOS silicon on insulator and achieves more than 23 dB power gain with 25.7 dBm saturated output power and 31% peak power added efficiency (PAE). The 6 dB back-off PAE is 25%, which...

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Veröffentlicht in:IEEE transactions on microwave theory and techniques 2018-03, Vol.66 (3), p.1339-1348
Hauptverfasser: Rostomyan, Narek, Jayamon, Jefy A., Asbeck, Peter M.
Format: Artikel
Sprache:eng
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Zusammenfassung:A two-stage, high-power symmetric Doherty power amplifier (PA) at 15 GHz is presented. The PA is implemented in 45 nm CMOS silicon on insulator and achieves more than 23 dB power gain with 25.7 dBm saturated output power and 31% peak power added efficiency (PAE). The 6 dB back-off PAE is 25%, which is a 64% improvement compared to ideal class B PA back-off performance. High output power is obtained by employing four-stack multigate devices at the output stage; driver stages employ two-stack devices. A simple analog predistortion linearizer is proposed that effectively corrects the AM-AM response of the Doherty PA and extends the P1dB from 23 to 25.1 dBm. The PA also exhibits excellent AM-PM response. The amplifier has compact dimensions and occupies only 1 mm 2 chip area, including pads.
ISSN:0018-9480
1557-9670
DOI:10.1109/TMTT.2017.2772785