Modeling Spin Coating Over Topography and Uniformity Improvements Through Fill Patterns for Advanced Packaging Technologies
An empirical model is proposed for predicting surface variations following dielectric spin coating as applied to existing underlying topography in redistribution layer fabrication. Test structures that represent a wide range of underlying feature widths, spacings, and heights are designed and fabric...
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Veröffentlicht in: | IEEE transactions on semiconductor manufacturing 2019-02, Vol.32 (1), p.62-69 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | An empirical model is proposed for predicting surface variations following dielectric spin coating as applied to existing underlying topography in redistribution layer fabrication. Test structures that represent a wide range of underlying feature widths, spacings, and heights are designed and fabricated. These are coated with multiple thicknesses of polyimide, and their surfaces are profiled and analyzed. An empirical model based on spatial filtering over underlying features is developed, with model parameters fit to coatings over a single feature for each set of process parameters. The model predicts post-coating thicknesses at the chip-scale. Comparisons between predictions and experimental results show an RMS error of 4.4% of the feature heights when averaged over each region profiled. Finally, fill patterns are designed and new test structures are simulated using these patterns. Simulation results suggest that global variations can be substantially reduced using such fill patterns, and these results are confirmed experimentally. |
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ISSN: | 0894-6507 1558-2345 |
DOI: | 10.1109/TSM.2018.2870712 |