TSV Repair Architecture for Clustered Faults

The poor quality of the die stacking process for 3-D integrated circuits can result in the failure of the process in the through-silicon-vias (TSVs) in dense regions. Previous works use the same number of redundant TSVs and architectures that do not consider the TSV density. A repair architecture an...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems 2019-01, Vol.38 (1), p.190-194
Hauptverfasser: Jang, Jaewon, Cheong, Minho, Kang, Sungho
Format: Artikel
Sprache:eng
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Zusammenfassung:The poor quality of the die stacking process for 3-D integrated circuits can result in the failure of the process in the through-silicon-vias (TSVs) in dense regions. Previous works use the same number of redundant TSVs and architectures that do not consider the TSV density. A repair architecture and an appropriate number of redundant TSVs, which are chosen considering the TSV density, are required for an improved repair rate. This paper proposes a method that demonstrates such an architecture and calculates the required number of TSVs. The method has a high repair rate for clustered faults, and wire-length problems are solved using the shift-based repair method.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2018.2808453