Design and implementation of Haar wavelet packet modulation based differential chaos shift keying communication system using FPGA

Efficient design and implementation of Haar wavelet packet modulation based differential chaos shift keying (HWPM - DCSK) using field programmable gate array (FPGA) platform was proposed. A fast algorithm for Haar wavelet packet transform (FHWPT) was used to enhance the complexity of the wavelet packet modulation (WPM) system. The HWPMDCSK system uses sixteen points of FHWPT and inverse fast Haar wavelet packet transform (IFHWPT) with spreading factor about eight for DCSK modulation. The suggested system was designed using a Xilinx system generator (XSG) tool. Software tools used in this work include ISE 14.5. A Virtex-4 (xc4vfx100-12ff1152) board was used for the implementation. The results are showing that the information bits are recovered successfully at the receiver side. The system was routed successfully with the resources of 5% slice flip flop, 5% look-up table (LUT), 10% occupied slices and 70% digital signal processing (DSP) 48s numbers from the selected device. The XSG is more reliable, flexible, easier, and gives the optimum design for the FPGA technicality via comparing with the conventional FPGA design. Also, the hardware simulation results show that the proposed system is efficient in performance for the real time communication system with low consuming power.