A Novel Digital-Intensive Hybrid Polar-I/Q RF Transmitter Architecture
A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining conventional inphase and quadrature (I/Q) with constrained phase modulation. The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulatio...
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Veröffentlicht in: | IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-12, Vol.65 (12), p.4390-4403 |
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creator | Buckel, Tobias Preyler, Peter Klinkan, Alexander Hamidovic, Damir Preissl, Christoph Mayer, Thomas Tertinek, Stefan Brandstaetter, Siegfried Wicpalek, Christian Springer, Andreas Weigel, Robert |
description | A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining conventional inphase and quadrature (I/Q) with constrained phase modulation. The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulation the quadrature component is kept small while the inphase component approaches the complex signal envelope. Compared to a digital-quadrature TX architecture this results in a significantly reduced average and peak RF-DAC cell utilization. Therefore, the RF-DAC can be operated in less back-off at higher average output power and drain efficiency. The phase modulation is constrained in order to relax the phase modulators system requirements. Compared to a digital polar TX architecture utilizing an RF digital phase-locked loop with two-point phase modulation, this results in reduced frequency modulation and digital-controlled oscillator tuning range requirements. In addition, the design effort is further shifted from analog to digital domain in order to better exploit the benefits of CMOS technology scaling. |
doi_str_mv | 10.1109/TCSI.2018.2840844 |
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The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulation the quadrature component is kept small while the inphase component approaches the complex signal envelope. Compared to a digital-quadrature TX architecture this results in a significantly reduced average and peak RF-DAC cell utilization. Therefore, the RF-DAC can be operated in less back-off at higher average output power and drain efficiency. The phase modulation is constrained in order to relax the phase modulators system requirements. Compared to a digital polar TX architecture utilizing an RF digital phase-locked loop with two-point phase modulation, this results in reduced frequency modulation and digital-controlled oscillator tuning range requirements. In addition, the design effort is further shifted from analog to digital domain in order to better exploit the benefits of CMOS technology scaling.</description><identifier>ISSN: 1549-8328</identifier><identifier>EISSN: 1558-0806</identifier><identifier>DOI: 10.1109/TCSI.2018.2840844</identifier><identifier>CODEN: ITCSCH</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>CMOS ; Computer architecture ; digital polar transmitter ; digital quadrature transmitter ; Frequency modulation ; hybrid polar-I/Q transmitter ; Microprocessors ; Modulators ; Phase locked loops ; Phase modulation ; Power efficiency ; Power generation ; quadrature modulation ; Radio frequency ; RF digital phase-locked loop (RF-DPLL) ; RF digital power amplifier (RF-DPA) ; RF digital-to-analog converter (RF-DAC) ; Tuning ; Wireless communication</subject><ispartof>IEEE transactions on circuits and systems. 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I, Regular papers</title><addtitle>TCSI</addtitle><description>A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining conventional inphase and quadrature (I/Q) with constrained phase modulation. The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulation the quadrature component is kept small while the inphase component approaches the complex signal envelope. Compared to a digital-quadrature TX architecture this results in a significantly reduced average and peak RF-DAC cell utilization. Therefore, the RF-DAC can be operated in less back-off at higher average output power and drain efficiency. The phase modulation is constrained in order to relax the phase modulators system requirements. Compared to a digital polar TX architecture utilizing an RF digital phase-locked loop with two-point phase modulation, this results in reduced frequency modulation and digital-controlled oscillator tuning range requirements. In addition, the design effort is further shifted from analog to digital domain in order to better exploit the benefits of CMOS technology scaling.</description><subject>CMOS</subject><subject>Computer architecture</subject><subject>digital polar transmitter</subject><subject>digital quadrature transmitter</subject><subject>Frequency modulation</subject><subject>hybrid polar-I/Q transmitter</subject><subject>Microprocessors</subject><subject>Modulators</subject><subject>Phase locked loops</subject><subject>Phase modulation</subject><subject>Power efficiency</subject><subject>Power generation</subject><subject>quadrature modulation</subject><subject>Radio frequency</subject><subject>RF digital phase-locked loop (RF-DPLL)</subject><subject>RF digital power amplifier (RF-DPA)</subject><subject>RF digital-to-analog converter (RF-DAC)</subject><subject>Tuning</subject><subject>Wireless communication</subject><issn>1549-8328</issn><issn>1558-0806</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>RIE</sourceid><recordid>eNo9kF1PwjAUhhujiYj-AOPNEq8HPe3ozi4JiiwxfuJ103WtlowN20LCv5cF4tV5L573PclDyC3QEQAtxsvZZzliFHDEMKOYZWdkAJMJphSpOO9zVqTIGV6SqxBWlLKCchiQ-TR56XamSR7ct4uqScs2mja4nUkW-8q7OnnrGuXTcvyefMyTpVdtWLsYjU-mXv-4aHTcenNNLqxqgrk53SH5mj8uZ4v0-fWpnE2fU825iGkOokYAAZVQVglag2V1jhVSy4TStCosrQxYFDWvqlpTVSBYLagFZmuu-ZDcH3c3vvvdmhDlqtv69vBSMmBCCMwwP1BwpLTvQvDGyo13a-X3Eqjsdclel-x1yZOuQ-fu2HHGmH8eOU4gR_4HutRlsQ</recordid><startdate>20181201</startdate><enddate>20181201</enddate><creator>Buckel, Tobias</creator><creator>Preyler, Peter</creator><creator>Klinkan, Alexander</creator><creator>Hamidovic, Damir</creator><creator>Preissl, Christoph</creator><creator>Mayer, Thomas</creator><creator>Tertinek, Stefan</creator><creator>Brandstaetter, Siegfried</creator><creator>Wicpalek, Christian</creator><creator>Springer, Andreas</creator><creator>Weigel, Robert</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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subjects | CMOS Computer architecture digital polar transmitter digital quadrature transmitter Frequency modulation hybrid polar-I/Q transmitter Microprocessors Modulators Phase locked loops Phase modulation Power efficiency Power generation quadrature modulation Radio frequency RF digital phase-locked loop (RF-DPLL) RF digital power amplifier (RF-DPA) RF digital-to-analog converter (RF-DAC) Tuning Wireless communication |
title | A Novel Digital-Intensive Hybrid Polar-I/Q RF Transmitter Architecture |
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