A Novel Digital-Intensive Hybrid Polar-I/Q RF Transmitter Architecture

A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining conventional inphase and quadrature (I/Q) with constrained phase modulation. The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulatio...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-12, Vol.65 (12), p.4390-4403
Hauptverfasser: Buckel, Tobias, Preyler, Peter, Klinkan, Alexander, Hamidovic, Damir, Preissl, Christoph, Mayer, Thomas, Tertinek, Stefan, Brandstaetter, Siegfried, Wicpalek, Christian, Springer, Andreas, Weigel, Robert
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A novel digital-intensive hybrid transmitter (TX) architecture is presented, combining conventional inphase and quadrature (I/Q) with constrained phase modulation. The proposed architecture utilizes an RF-DAC with phase modulated RF clock and adjusted I/Q components. By incorporating phase modulation the quadrature component is kept small while the inphase component approaches the complex signal envelope. Compared to a digital-quadrature TX architecture this results in a significantly reduced average and peak RF-DAC cell utilization. Therefore, the RF-DAC can be operated in less back-off at higher average output power and drain efficiency. The phase modulation is constrained in order to relax the phase modulators system requirements. Compared to a digital polar TX architecture utilizing an RF digital phase-locked loop with two-point phase modulation, this results in reduced frequency modulation and digital-controlled oscillator tuning range requirements. In addition, the design effort is further shifted from analog to digital domain in order to better exploit the benefits of CMOS technology scaling.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2018.2840844