A Generic Error-Free AI-Based Encoding for FFT Computation

This paper studies the challenge of accurate FFT computation. A generic and error-free encoding is proposed based on the algebraic integers (AIs). A wise AI-based encoding may greatly decrease the error due to the non-trivial twiddle factors in the FFT computation. Further, a new method for predicting the well-pruned architecture is presented which helps designing an optimized and low-cost architecture when using the AI-based encoding. In order to examine the proposed AI-based FFT computation and also the procedure of designing an optimized architecture, a custom AI-based 16-point radix-2 2 FFT architecture has been designed and implemented using 180-nm CMOS technology. Experimental results show that compared to the benchmark fixed-point architectures, the proposed architecture not only greatly improves the SQNR, but also provides higher throughput. Further, the power consumption and area overhead of the ASIC implementation both show an overhead of less than 45% compared to the reference architecture.