Design of Optimized Reversible Squaring and Sum-of-Squares Units

Reversible logic has gained importance in the last few decades because of its low power dissipation. Quantum cost, garbage outputs, ancillary inputs and gate count are some of the performance parameters used to weigh reversible designs against one another. Optimization of these parameters is of great relevance to obtain an optimal design. This paper presents the design of a reversible squaring and sum-of-squares units explored for a trade-off between garbage outputs and quantum cost. The proposed work focuses on the design of dedicated unsigned and signed squaring units with a generalized methodology for n -bit squaring unit and novel sum-of-squares unit. For the optimization of the squaring circuit, the redundant product terms from the multiplier logic are eliminated. The ancillary inputs are regenerated due to which the extraneous garbage outputs are reduced. The obtained results are compared with existing state-of-art designs for performance. The garbage-cost optimized designs were found to have a 50% improvement of both ancillary inputs and garbage outputs over the direct implementation; 51% improvement of ancillary inputs and 27% improvement of quantum cost over the garbage free designs. Usage of optimized dedicated sum-of-squares unit enhances the functionality of the digital signal processor.