Performance Pathologies in Hardware Transactional Memory

Transactional memory is a promising approach to ease parallel programming. Hardware transactional memory system designs reflect choices along three key design dimensions: conflict detection, version management, and conflict resolution. The authors identify a set of performance pathologies that could...

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Veröffentlicht in:	IEEE MICRO 2008-01, Vol.28 (1), p.32-41
Hauptverfasser:	Bobba, Jayaram, Moore, Kevin E., Volos, Haris, Yen, Luke, Hill, Mark D., Swift, Michael M., Wood, David A.
Format:	Artikel
Sprache:	eng
Schlagworte:	Acceleration Computer architecture Computer memory conflict detection conflict resolution Content management Degradation Hardware hardware transactional memory Memory management Pathology Programming profession Robustness Sun Systems design Systems development transactional memory version management
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Beschreibung
Zusammenfassung:	Transactional memory is a promising approach to ease parallel programming. Hardware transactional memory system designs reflect choices along three key design dimensions: conflict detection, version management, and conflict resolution. The authors identify a set of performance pathologies that could degrade performance in proposed HTM designs. Improving conflict resolution could eliminate these pathologies so designers can build robust HTM systems.
ISSN:	0272-1732 1937-4143
DOI:	10.1109/MM.2008.11