Maintaining I/O Data Coherence in Embedded Multicore Systems
In embedded systems, multiple cores mean multiple caches and often multiple cache levels. Consequently, maintaining coherency between the cores' caches and the data generated or consumed by I/O devices is challenging, with different solutions trading off hardware versus software complexity. The...
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Veröffentlicht in: | IEEE MICRO 2009-05, Vol.29 (3), p.10-19 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In embedded systems, multiple cores mean multiple caches and often multiple cache levels. Consequently, maintaining coherency between the cores' caches and the data generated or consumed by I/O devices is challenging, with different solutions trading off hardware versus software complexity. The optimal approach for I/O data coherence depends on application and system characteristics, and might require a combination of techniques. |
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ISSN: | 0272-1732 1937-4143 |
DOI: | 10.1109/MM.2009.44 |