Efficiency analysis of techniques for weighting elements arrangement on the chip of unary digital-to-analog converter

Efficiency analysis of techniques for weighting elements arrangement on the chip of unary digital-to-analog converter

The paper presents a review of realizations of the matrices of unaryDACweighting elements. A mathematical model of unary DAC taking into account the systematic error has been built. The static characteristics were simulated, and conclusions were made regarding the preferred techniques of forming the...

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Veröffentlicht in:Radioelectronics and communications systems 2017-05, Vol.60 (5), p.225-232
Hauptverfasser: Konstantinov, A. I., Yenuchenko, M. S., Korotkov, A. S.
Format: Artikel
Sprache:eng
Schlagworte:
Analog to digital converters
Communications Engineering
Computational efficiency
Computer simulation
Computing time
Construction
Digital to analog conversion
Digital to analog converters
Engineering
Errors
Forming
Mathematical analysis
Mathematical models
Matrices (mathematics)
Matrix methods
Networks
Nonlinearity
Static characteristics
Weighting
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Beschreibung
Zusammenfassung:The paper presents a review of realizations of the matrices of unaryDACweighting elements. A mathematical model of unary DAC taking into account the systematic error has been built. The static characteristics were simulated, and conclusions were made regarding the preferred techniques of forming the matrix of weighting elements for reducing the nonlinearity of unary DACs.
ISSN:0735-2727
1934-8061
DOI:10.3103/S0735272717050041