Novel Eliminated Common-Mode Voltage PWM Sequences and an Online Algorithm to Reduce Current Ripple for a Three-Level Inverter

A novel carrier-based zero common-mode voltage (ZCMV) pulse-width-modulation (PWM) algorithm for a three-level (3L) neutral-point-clamped (NPC) inverter based on a group of modified ZCMV PWM sequences is proposed. In a half-carrier cycle containing four consecutive states, one among the three ZCMV s...

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Veröffentlicht in:IEEE transactions on power electronics 2017-10, Vol.32 (10), p.7482-7493
Hauptverfasser: Tam-Khanh Tu Nguyen, Nho-Van Nguyen, Prasad, Nadipuram R.
Format: Artikel
Sprache:eng
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Zusammenfassung:A novel carrier-based zero common-mode voltage (ZCMV) pulse-width-modulation (PWM) algorithm for a three-level (3L) neutral-point-clamped (NPC) inverter based on a group of modified ZCMV PWM sequences is proposed. In a half-carrier cycle containing four consecutive states, one among the three ZCMV switching states is applied twice. This paper proposes four novel ZCMV PWM sequences in addition to those that are realized from switching state arrangements in PWM techniques for the conventional two-level inverter. The harmonic characteristics due to those sequences are investigated in detail. Then, a simple online algorithm to minimize the root mean square current ripple, which can be advantageously extended for an n-inverter, is proposed. Harmonic performance and switching loss characteristic of the proposed ZCMV PWM have been compared to those of a conventional space-vector PWM and a three-state ZCMV PWM with reduced current ripple. Comparative analytical results verified by experimentation have shown that the proposed PWM scheme reduces the current harmonic distortion considerably in a high modulation index range of a 3L NPC inverter.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2016.2634009