A 6-GS/s 9.5-b Single-Core Pipelined Folding-Interpolating ADC With 7.3 ENOB and 52.7-dBc SFDR in the Second Nyquist Band in 0.25- \mu m SiGe-BiCMOS
A pipelined folding-interpolating analog-to-digital converter (ADC) with a distributed quantizer is presented. The mismatch-insensitive analog frontend provides excellent spurious-free dynamic range (SFDR) and signal-to-noise ratio without calibration or digital postprocessing. The algorithm of the...
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Veröffentlicht in: | IEEE transactions on microwave theory and techniques 2017-02, Vol.65 (2), p.414-422 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A pipelined folding-interpolating analog-to-digital converter (ADC) with a distributed quantizer is presented. The mismatch-insensitive analog frontend provides excellent spurious-free dynamic range (SFDR) and signal-to-noise ratio without calibration or digital postprocessing. The algorithm of the digital coder relaxes the requirements on the interface between analog core and digital coder. The single-core ADC achieves an effective resolution of 7.3 b and an SFDR of 52.7 dBc in the second Nyquist band at 6 GS/s with an overall power consumption of 10.2 W. |
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ISSN: | 0018-9480 1557-9670 |
DOI: | 10.1109/TMTT.2016.2647714 |