Traffic Aware Energy Efficient Router: Architecture, Prototype and Algorithms

Energy efficient routers are important and promising devices in the roadmap toward green networking. In this paper, we explore this topic with a traffic aware design that can automatically adapt the router's energy consumption to the network traffic in real time with transitions at the scale from microseconds to nanoseconds. In this paper, we make three contributions. First, we propose an energy efficient router architecture using frequency scaling, which is extended from the contemporary line card architecture of the router. Second, we prototype our architecture on a gigabit NetFPGA platform, which extends a router design on that platform to dynamically work at six frequencies. Then, we discuss the implementation in detail and present a per-packet-based power consumption model from real-world measurements. Third, we further propose four algorithms, which efficiently and automatically adapt power grades under the methodology of periodical and threshold-based scaling. Our experiments are carried out on two platforms, a NetFPGA prototype for feasible scenarios and a simulator for other scenarios in excess of the NetFPGA port limit with parameters synthetically generated to the real-world measurement. Experimental results show that approximately 25% power can be saved with our architecture and algorithms. Conclusions are also given to summarize our findings.