A 42 fJ/Step-FoM Two-Step VCO-Based Delta-Sigma ADC in 40 nm CMOS

A 40 MHz-BW 10 bit two-step VCO-based Delta-Sigma ADC is presented. With the open-loop structure and highly digital building blocks, a robust performance, high bandwidth and high power efficiency are achieved. The nonlinearities of the coarse and the fine VCO-based quantizers are mitigated by distor...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2015-03, Vol.50 (3), p.714-723
Hauptverfasser:	Xinpeng Xing, Gielen, Georges G. E.
Format:	Artikel
Sprache:	eng
Schlagworte:	Anglog-to-digital converter Clocks Delays delta-sigma ADC distortion cancellation Gain high-banwidth highly-digital intrinsic anti-aliasing intrinsic DEM Logic gates low-power nonlinearity mitigation open-loop power-efficient Quantization (signal) time-domain ADC Transistors two-step VCO-based ADC VCO-based quantizer voltage swing reduction Voltage-controlled oscillators
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