Low Temperature Processed Two-Transistor- Two-Capacitor-Based Ferroelectric Random Access Memory

We have demonstrated a low temperature fully integrated process for a ferroelectric random access memory array for potential flexible electronics applications. The memory cell is based on a two-transistor-two-capacitor structure, with cadmium sulfide as the semiconductor material for n-channel thin-film transistors, and poly(vinylidene fluoride-trifluoroethylene) copolymer as the ferroelectric material for capacitors. At VDD = 5 V, a voltage difference of ~1 V between the two states (0 and 1) is achieved at the output of the sense amplifier.