A 6.4-Gb/s Voltage-Mode Near-Ground Receiver With a One-Tap Data and Edge DFE

A low-power receiver with a one-tap data and edge decision-feedback equalizer (DFE) and a clock recovery circuit is presented. The receiver employs analog adders for the tap-weight summation in both the data and the edge path to simultaneously optimize both the voltage and timing margins. A switched...

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Veröffentlicht in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2014-06, Vol.61 (6), p.438-442
Hauptverfasser: Kim, Seok, Jin, Eun-Young, Kwon, Kee-Won, Kim, Jintae, Chun, Jung-Hoon
Format: Artikel
Sprache:eng
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Zusammenfassung:A low-power receiver with a one-tap data and edge decision-feedback equalizer (DFE) and a clock recovery circuit is presented. The receiver employs analog adders for the tap-weight summation in both the data and the edge path to simultaneously optimize both the voltage and timing margins. A switched-capacitor input stage allows the receiver to be fully compatible with near-GND input levels without extra level conversion circuits. Furthermore, the critical path of the DFE is simplified to relax the timing margin. Fabricated in the 65-nm CMOS technology, a prototype DFE receiver shows that the data-path DFE extends the voltage and timing margins from 40 mV pp and 0.3 unit interval (UI), respectively, to 70 mV pp and 0.6 UI, respectively. Likewise, the edge-path equalizer reduces the uncertain sampling region (the edge region), which results in 17% reduction of the recovered clock jitter. The DFE core, including adders and samplers, consumes 1.1 mW from a 1.2-V supply while operating at 6.4 Gb/s.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2014.2320012