A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled QVCO in 65 nm CMOS Technology

A fully integrated 60 GHz frequency synthesizer with an in-phase injection-coupled quadrature voltage-controlled oscillator (IPIC-QVCO) is proposed. Through a particular symmetrical coupling network formed by diode-connected transistors, the in-phase coupling is realized in the IPIC-QVCO, which redu...

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Veröffentlicht in:IEEE journal of solid-state circuits 2014-02, Vol.49 (2), p.347-359
Hauptverfasser: Yi, Xiang, Boon, Chirn Chye, Liu, Hang, Lin, Jia Fu, Lim, Wei Meng
Format: Artikel
Sprache:eng
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Zusammenfassung:A fully integrated 60 GHz frequency synthesizer with an in-phase injection-coupled quadrature voltage-controlled oscillator (IPIC-QVCO) is proposed. Through a particular symmetrical coupling network formed by diode-connected transistors, the in-phase coupling is realized in the IPIC-QVCO, which reduces both phase noise and phase error. A compact inductor-less divider chain is designed to reduce power consumption. A self-correcting low spur charge pump is employed to reduce reference spur. A standalone 60 GHz IPIC-QVCO and a fully integrated PLL are implemented in standard 65 nm low power CMOS technology. The measurement results show that the QVCO covers a frequency range from 57.88 to 68.33 GHz while consuming 11.4 mW power from a 1.2 V supply. The phase noise of the QVCO is -92 ~ -95 dBc/Hz at 1 MHz offset. The FOM and FOM T of the QVCO are -178.1 ~ -179.7 and -182.5 ~ -184.1 dBc/Hz respectively. The tuning range of the frequency synthesizer is from 57.9 to 68.3 GHz, and the power consumption is 24.6 mW. The phase noise of the frequency synthesizer is -89.8 ~ -91.5 dBc/Hz at 1 MHz offset across the frequency band.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2013.2293021